
Microelectronics Design
Code: 102720Credits: 6
| Degree programme | Type | Course |
|---|---|---|
| Electronic Engineering for Telecommunication | OP | 4 |
Contact lecturer
- Name :
- Arantxa Uranga del Monte
- Email :
- arantxa.uranga@uab.cat
Teaching staff
- Arantxa Uranga del Monte
Teaching staff (external to UAB)
- José Gabriel Macías Montero
Group languages
You can consult this information at the end of the document.
Prerequisites
To face up this subject in the best conditions it is convenient to have a previous knowledge of circuit resolution, equivalent models of large and small signal and general knowledge of electronic, both analog and digital.
Objectives
To have a general view of the microelectronic design problem.
To know the stages of the design of an integrated circuit, distinguishing those that correspond specifically to the designer and those that correspond to the technologist.
To know the strategies and design stages, together with the CAD tools used, as well as the different alternatives or design styles.
To understand the operation of general-purpose analog and digital circuits.
Learning outcomes
- Design basic analogue and digital integrated circuits based on specifications of cost, size, power consumption and reliability and applying specific programming techniques.
- Apply simulation techniques for performance analysis.
- Apply the basic techniques of integrated systems and circuit testing.
- Develop the capacity for analysis and synthesis.
- Develop independent learning strategies.
- Make one's own decisions.
- Use English as a language of communication and as the reference in professional relations.
- Manage information by critically incorporating the innovations of one's professional field, and analysing future trends.
Contents
UNIT 1. Introduction to microelectronic design
1.1 Evolution of microelectronics
1.2 Basic concepts of microelectronic design
1.3 Design flow
UNIT 2. Fundamentals of the MOS transistor in microelectronic design
2.1 MOSFET Physical structure
2.2 MOSFET Model
2.3 CMOS design parameters
2.4 CMOS technological scaling
2.5 Design of passive elements: resistors, capacitors
UNIT 3: Analog microelectronic design
3.1 Active resistors
3.2 Current sources. Current mirrors.
3.3 Basic inverting amplifiers. Cascode configuration.
3.4 Differential stage.
3.5 The operational amplifier
UNIT 4. Digital microelectronic design
4.1 MOSFET model for digital design
4.2 The inverter: DC characteristic, commutation characteristic and layout
4.3 Full custom design of CMOS gates
Learning activities and methodology
| Title | Hours | ECTS | Learning outcomes |
|---|---|---|---|
| Report on practical work (lab work) | 12 | 0.48 | 4, 6 |
| problem solving sessions | 12 | 0.48 | 4, 6 |
| Search of information | 12 | 0.48 | 4, 6, 7, 8 |
| theory classes | 24 | 0.96 | 1, 2, 3, 4 |
| lab sessions | 12 | 0.48 | 1, 4 |
| problem resolution | 20 | 0.8 | 1, 4, 5, 6 |
| Individual study | 52 | 2.08 | 1, 2, 3, 5 |
During the semester, theory lessons and exercises will be held in the classroom. Theory lessons will present the scientific-technical knowledge of the subject in a structured, clear and ordered manner. The students will learn the basics with instructions on how to complete and deepen these contents. During the exercises, in small groups, students will have to solve problems related to the subject exposed in the master classes, with the teacher's support. The objective is to complete and deepen the understanding of the contents of the subject.
A total of 4 sessions of laboratory sessions, of compulsory attendance will be planned. The objective of the lab sessions is to promote active student learning by working on the implementation and design of basic circuits, as well as developing critical reasoning and teamwork competencies.
Assessment
Continuous assessment activities
| Title | Weight | Hours | ECTS | Learning outcomes |
|---|---|---|---|---|
| Active participation during the lessons and activities | 10% | 1 | 0.04 | 1, 2, 3, 4, 6 |
| Specific written and/or oral presentation of a design work | 20% | 1 | 0.04 | 1, 2, 4, 5, 6, 7, 8 |
| Partial written exam | 40% | 3 | 0.12 | 1, 4, 5, 6, 7, 8 |
| Report on practical work (lab work) | 30% | 1 | 0.04 | 2, 3, 5 |
This subject/module does not include the single assessment system.
Continuous evaluation process:
The evaluation of the subject will be carried out continuously through four types of clearly differentiated activities:partial written exam, lab sessions, homework and active participation during the activities
There is no differentiated treatment for repeating students with regard to the partial exam, homework, or class participation.
1. Partial written exam
The grade corresponding to the partial written test has a weight of 40%, with a score above 4 required to average with the rest of the grades. This test can be retaken in the final recovery exam of the subject, requiring a 4 to average
2. Lab sessions:
The attendance to the lab sessions and the delivery of the corresponding reports are indispensable condition to pass the subject.
The mark corresponding to the laboratory sessions has a weight of 30% of the final grade, and a minimum score of 5 is required so that they can be considered for the evaluation of the subject.
A mark smaller than 5 in the lab sessions implies the student will fail the complete subject.
3. Work proposed by the teacher:
One written reports and / or oral presentation will be proposed by the teacher. The work must be done individually.
Students who have failed the works must submit to a final synthesis exam and take the exam of all the material not approved. A minimum final mark of 5 points will be required to average with the rest of the marks obtained by the student.
4. Active participation during the lessons and activities
Active participation in activities will be individually assessed
The final grade of the course will be calculated based on the weighting (midterm exam, practical sessions, the assignment proposed by the teaching staff, and active participation in class) of the four assessment activities, as previously indicated.
Recovery process: final exam
In order to be evaluated, the student must have a lab mark equal to or greater than 5, and must have taken the first midterm exam (Partial written exam).
Students can also attend to the final exam, even if they have passed, to improve the final qualification. In these cases the students renounce to the previous mark.
In the synthesis exam, the student may recover the partial written test, the project report, or both. A final minimum mark of 4 points will be required in the synthesis test to be computed with the rest of the marks.
In accordance with thecurrent academic regulations, irregularities committed by a student that can lead to a variation of the qualification will be evaluated with a zero (0). For example, plagiarizing or copying an evaluation activity, will imply a zeromark in the activity. Assessment activities qualified in this way will not be recoverable. If it is necessary to pass any of these assessment activities, the student will fail this subject, without opportunity to recover it in the same course
Final grade of the course in the case of failing
- Only if the student does not submit any practical reports or take‑home assignments, and does not sit the midterm exam, the final grade will be Not Assessable.
- If the student does not sit the finalt exam, having failed either the first midterm or the proposed assignment, the final grade will be the weighted average of both activities, according to their respective evaluation weights, with a maximum value of 4, provided that the practical sessions have been passed.
- If a student has not passed the practical sessions or does not obtain the minimum required score in the synthesis exam, the course will be considered failed and the student will receive the grade resulting from the result of the synthesis exam or of the first midterm and the proposed assignment (according to their corresponding weight), provided that this result is below 5. Otherwise, the final grade will be 4
Review of Grades
The standard review of assessment activities will begin at least twenty-four hours after the grades have been made public, or on the same day if previously announced publicly. At the discretion of the professors, in cases considered appropriate, any written test must be subsequently validated with an oral test. In the event of discrepancies in the results of the two tests, the oral test will prevail.
Special qualifications
For each subject , the number of Honors qualifications results from calculating the five percent or fraction of the students enrolled inall the teaching groups. Students will only be awarded if they have obtained a final mark equal to or greater than 9.00, and whenever the teacher considers it appropriate(depending on the student's excellence).
Use of Artificial Intelligence (AI)
In this course, the use of Artificial Intelligence (AI) technologies is not permitted at any stage. Any assignment that includes AI-generated content will be considered a breach of academic integrity and may result in partial or total penalties on the activity’s grade, or more serious sanctions in severe cases.
Bibliography
- R.J.Baker, H.W. Li, D.E. Boyce. CMOS: circuit design, layout, and simulation. IEEE Press Series on Microelectronic Systems. 2019
- P.E. Allen, D.R. Holberg. CMOS analog circuit design. HRW Series in Electrical and Computer Engineering.
- B. Razavi. Design of analog CMOS integrated circuits. McGraw-Hill. 2006
- F. Maloberti,Analog Design for CMOS VLSI Systems, Kluwer Academic Publishers
Software
Cadence ( IC package).
The virtual platform employed for communication with the student will be the virtual campus.
Course groups and languages
The information provided is provisional until November 30. After this date, you will be able to consult the language of each group through this link. To access the information, you will need to enter the course CODE
| Type of teaching | Group | Language | Semester | Shift |
|---|---|---|---|---|
| (TE) Theory | 320 | Spanish | first semester | morning-mixed |
| (PAUL) Classroom practices | 321 | Catalan | first semester | morning-mixed |
| (PLAB) Practical laboratories | 321 | Catalan | first semester | morning-mixed |
| (PLAB) Practical laboratories | 322 | Catalan | first semester | afternoon |